/*============================================================================*/
/*                        Tortoise Team			                              */
/*============================================================================*/
/*                        OBJECT SPECIFICATION                                */
/*============================================================================*
* C Source:         %MAL_EMIOS.c%
* Instance:         RPL_1
* %version:         1 %
* %created_by:      Andres Torres %
* %date_created:    Sunday May 20 13:41:01 2012 %
*=============================================================================*/
/* DESCRIPTION : Describes the functions for uC Abstraction Layer for EMIOS	  */
/*	module																	  */
/*============================================================================*/
/* FUNCTION COMMENT : Source file for uC Abstraction layer for EMIOS module   */
/*                                                                            */
/*============================================================================*/
/*                               OBJECT HISTORY                               */
/*============================================================================*/
/*  REVISION |   DATE      |                               |      AUTHOR      */
/*----------------------------------------------------------------------------*/
/*  1.0      | 25/05/2012  |                               | Andres Torres    */
/* Integration under Continuus CM                                             */
/*============================================================================*/

/* Includes */
/* -------- */
#include "stdtypedef.h"

/* Functions macros, constants, types and datas         */
/* ---------------------------------------------------- */
/* Functions macros */

/*==================================================*/ 
/* Definition of constants                          */
/*==================================================*/ 
/* BYTE constants */

/* WORD constants */

/* LONG and STRUCTURE constants */


/*======================================================*/ 
/* Definition of RAM variables                          */
/*======================================================*/ 
/* BYTE RAM variables */

/* WORD RAM variables */

/* LONG and STRUCTURE RAM variables */

/*======================================================*/ 
/* close variable declaration sections                  */
/*======================================================*/ 

/* Private defines */

//Emios channel functionality
/*!
  \def OPWM
  OPWM functionatility
*/
#define OPWM	0x60

/*!
  \def MCB
  MCB functionality
*/
#define MCB		0x50

/* Private functions prototypes */
/* ---------------------------- */

/* Exported functions prototypes */
/* ----------------------------- */
void vfnSet_Duty_Opwm(T_UBYTE ub_channel, T_UWORD uw_duty);
void vfnInit_Emios_0_Opwm(T_UBYTE ub_channel, T_UWORD uw_a, T_UWORD uw_b, T_UBYTE ub_counterBus);
void vfnInit_Emios_0_Mcb(T_UBYTE ub_channel, T_UWORD uw_period);
void vfnInit_Emios_0(void);
void vfnSetup_Emios_0(void);
/* Inline functions */
/* ---------------- */

/* Private functions */
/* ----------------- */


/* Exported functions */
/* ------------------ */


/**************************************************************
 *  Name                 :	vfnSetup_Emios_0
 *  Description          :	Main Configuration Register to setup Emios
 *  Parameters           :  void
 *  Return               :	void
 *  Critical/explanation :  No
 **************************************************************/
void vfnSetup_Emios_0(void)
{
	/* Ensure that eMIOS0 is not disabled */
	EMIOS_0.MCR.B.MDIS = 0;
	EMIOS_0.MCR.B.GPRE= 63;   							/* 63 means a clock division of 64. If System clock is 64 MHz, eMIOS0 clock will be 1 MHz */ 
  	EMIOS_0.MCR.B.GTBE = 1;   							/* Enable global time base */
  	EMIOS_0.MCR.B.FRZ = 1;    							/* Enable stopping channels when in debug mode */
}

/**  **/

/**************************************************************
 *  Name                 : 	vfnInit_Emios_0
 *  Description          :	Main Configuration Register to initialize Emios
 *  Parameters           :  void
 *  Return               :	void
 *  Critical/explanation :  No
 **************************************************************/
void vfnInit_Emios_0(void)
{
  	EMIOS_0.MCR.B.GPREN = 1;  							/* Enable eMIOS clock, start counting */
}

/**************************************************************
 *  Name                 :  vfnInit_Emios_0_Mcb
 *  Description          :	Define Emios Channel as Modulus Counter
 *  Parameters           :  [Input: ub_channel; uw_period, Output, Input / output]
 *  Return               :	void
 *  Critical/explanation :  No
 **************************************************************/
void vfnInit_Emios_0_Mcb(T_UBYTE ub_channel, T_UWORD uw_period)
{
  	EMIOS_0.CH[ub_channel].CADR.R      = uw_period;	    /* Period will be u16Period clocks (usec) */
  	EMIOS_0.CH[ub_channel].CCR.B.MODE  = MCB; 			/* Set as Modulus Up Counter Buffered (MCB) */
  	
  	//TODO: Is neccesary this?
 	EMIOS_0.CH[ub_channel].CCR.B.UCPRE = 0;    			/* Set channel prescaler divide by 3+1=4 (to 1Mhz) */
 	
  	EMIOS_0.CH[ub_channel].CCR.B.UCPEN = 1;    			/* Enable prescaler*/
  	EMIOS_0.CH[ub_channel].CCR.B.FREN  = 1; 			/* Freeze channel counting when in debug mode */
}

/**************************************************************
 *  Name                 : 	vfnInit_Emios_0_Opwm
 *  Description          :	Define Emios Channel as Opwm
 *  Parameters           :  [Input: ub_channel; uw_a; uw_b; ub_busSelected, Output, Input / output]
 *  Return               :	void
 *  Critical/explanation :  No
 **************************************************************/
void vfnInit_Emios_0_Opwm(T_UBYTE ub_channel, T_UWORD uw_a, T_UWORD uw_b, T_UBYTE ub_counterBus)
{								
  	EMIOS_0.CH[ub_channel].CADR.R = uw_a;        		/* Leading edge when channel counter bus=u16A */
  	EMIOS_0.CH[ub_channel].CBDR.R = uw_b;        		/* Trailing edge when channel's counter bus=u16B */
  	
  	EMIOS_0.CH[ub_channel].CCR.B.BSL = ub_counterBus;	/* Use counter bus selected */
  	
  	EMIOS_0.CH[ub_channel].CCR.B.EDPOL = 1;				/* Polarity-leading edge sets output/trailing clears */
  	EMIOS_0.CH[ub_channel].CCR.B.MODE = OPWM; 			/* Mode is OPWM Buffered */
  	EMIOS_0.CH[ub_channel].CCR.B.FREN  = 1; 			/* Freeze channel counting when in debug mode */
}

/**************************************************************
 *  Name                 : 	vfnSet_Duty_Opwm
 *  Description          :	Stablish Duty Cicle in clock pulses for an Emios channel
 *  Parameters           :  [Input: ub_channel; uw_duty, Output, Input / output]
 *  Return               :	void
 *  Critical/explanation :  No
 **************************************************************/
void vfnSet_Duty_Opwm(T_UBYTE ub_channel, T_UWORD uw_duty) 
{
	EMIOS_0.CH[ub_channel].CBDR.R = uw_duty;     					/* Trailing edge when channel counter bus = u16Duty */
}